=================================================================== MT7621 stage1 code 10:33:55 (ASIC) CPU=500000000 HZ BUS=166666666 HZ ================================================================== Change MPLL source from XTAL to CR... do MEMPLL setting.. MEMPLL Config : 0x11100000 3PLL mode + External loopback === XTAL-40Mhz === DDR-1200Mhz === PLL4 FB_DL: 0x5, 1/0 = 575/449 15000000 PLL3 FB_DL: 0x16, 1/0 = 668/356 59000000 PLL2 FB_DL: 0x1c, 1/0 = 537/487 71000000 do DDR setting..[01F40000] Apply DDR3 Setting...(use customer AC) 0 8 16 24 32 40 48 56 64 72 80 88 96 104 112 120 -------------------------------------------------------------------------------- 0000:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0001:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0002:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0003:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0004:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0005:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0006:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0007:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0008:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0009:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 000A:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 000B:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 000C:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 000D:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 000E:| 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 000F:| 0 0 0 0 1 1 1 1 1 1 1 1 1 1 0 0 0010:| 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0011:| 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0012:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0013:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0014:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0015:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0016:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0017:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0018:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0019:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 001A:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 001B:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 001C:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 001D:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 001E:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 001F:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 rank 0 coarse = 15 rank 0 fine = 72 B:| 0 0 0 0 0 0 0 0 1 1 1 0 0 0 0 0 opt_dle value:9 DRAMC_R0DELDLY[018]=00001F1F ================================================================== RX DQS perbit delay software calibration ================================================================== 1.0-15 bit dq delay value ================================================================== bit| 0 1 2 3 4 5 6 7 8 9 -------------------------------------- 0 | 11 10 11 11 9 9 11 7 5 7 10 | 7 7 7 9 6 9 -------------------------------------- ================================================================== 2.dqs window x=pass dqs delay value (min~max)center y=0-7bit DQ of every group input delay:DQS0 =31 DQS1 = 31 ================================================================== bit DQS0 bit DQS1 0 (1~60)30 8 (1~57)29 1 (1~59)30 9 (1~60)30 2 (1~60)30 10 (1~58)29 3 (1~58)29 11 (1~56)28 4 (1~61)31 12 (1~57)29 5 (1~60)30 13 (1~58)29 6 (1~62)31 14 (1~61)31 7 (1~61)31 15 (1~60)30 ================================================================== 3.dq delay value last ================================================================== bit| 0 1 2 3 4 5 6 7 8 9 -------------------------------------- 0 | 12 11 12 13 9 10 11 7 7 8 10 | 9 10 9 11 6 10 ================================================================== ================================================================== TX perbyte calibration ================================================================== DQS loop = 15, cmp_err_1 = ffff0000 dqs_perbyte_dly.last_dqsdly_pass[0]=15, finish count=1 dqs_perbyte_dly.last_dqsdly_pass[1]=15, finish count=2 DQ loop=15, cmp_err_1 = ffff0000 dqs_perbyte_dly.last_dqdly_pass[0]=15, finish count=1 dqs_perbyte_dly.last_dqdly_pass[1]=15, finish count=2 byte:0, (DQS,DQ)=(8,8) byte:1, (DQS,DQ)=(8,8) 20,data:88 [EMI] DRAMC calibration passed =================================================================== MT7621 stage1 code done CPU=500000000 HZ BUS=166666666 HZ =================================================================== U-Boot U-Boot 1.1.3 (Oct 25 2017 - 11:40:58) Board: Ralink APSoC DRAM: 256 MB relocate_code Pointer at: 8ffb8000 Config XHCI 40M PLL ****************************** Software System Reset Occurred ****************************** flash manufacture id: ef, device id 40 18 find flash: W25Q128BV *** Warning - bad CRC, using default environment ============================================ Ralink UBoot Version: 5.0.0.0 -------------------------------------------- ASIC MT7621A DualCore (MAC to MT7530 Mode) DRAM_CONF_FROM: Auto-Detection DRAM_TYPE: DDR3 DRAM bus: 16 bit Xtal Mode=3 OCP Ratio=1/3 Flash component: SPI Flash Date:Oct 25 2017 Time:11:40:58 ============================================ icache: sets:256, ways:4, linesz:32 ,total:32768 dcache: sets:256, ways:4, linesz:32 ,total:32768 ##### The CPU freq = 880 MHZ #### estimate memory size =256 Mbytes #Reset_MT7530 set LAN/WAN LLLLW Please choose the operation: 1: Load system code to SDRAM via TFTP. 2: Load system code then write to Flash via TFTP. 3: Boot system code via Flash (default). 4: Entr boot command line interface. 7: Load Boot Loader code then write to Flash via Serial. 9: Load Boot Loader code then write to Flash via TFTP. a: Load JCG firmware then write to Flash via TFTP. 0 3: System Boot system code via Flash. ## Booting image at bc050000 ... Image Name: Linux Kernel Image Image Type: MIPS Linux Kernel Image (lzma compressed) Data Size: 7653710 Bytes = 7.3 MB Load Address: 81001000 Entry Point: 8100d1d0 Verifying Checksum ... OK Uncompressing Kernel Image ... OK No initrd ## Transferring control to Linux (at address 8100d1d0) ... ## Giving linux memsize in MB, 256 Starting kernel ... Linux version 2.6.36+ (root@devsrv9) (gcc version 4.6.3 (Buildroot 2012.11.1) ) #251 SMP Wed Oct 25 10:29:25 CST 2017 The CPU feqenuce set to 880 MHz GCMP present CPU revision is: 0001992f (MIPS 1004Kc) Software DMA cache coherency Determined physical RAM map: memory: 10000000 @ 00000000 (usable) Initrd not found or empty - disabling initrd Zone PFN ranges: DMA 0x00000000 -> 0x00001000 Normal 0x00001000 -> 0x00010000 Movable zone start PFN for each node early_node_map[1] active PFN ranges 0: 0x00000000 -> 0x00010000 Detected 3 available secondary CPU(s) PERCPU: Embedded 7 pages/cpu @81d11000 s7296 r8192 d13184 u65536 pcpu-alloc: s7296 r8192 d13184 u65536 alloc=16*4096 pcpu-alloc: [0] 0 [0] 1 [0] 2 [0] 3 Built 1 zonelists in Zone order, mobility grouping on. Total pages: 65024 Kernel command line: console=ttyS0,57600n8 root=/dev/ram0 console=ttyS0,57600 root=/dev/ram0 rootfstype=squashfs,jffs2 PID hash table entries: 1024 (order: 0, 4096 bytes) Dentry cache hash table entries: 32768 (order: 5, 131072 bytes) Inode-cache hash table entries: 16384 (order: 4, 65536 bytes) Primary instruction cache 32kB, VIPT, , 4-waylinesize 32 bytes. Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes MIPS secondary cache 256kB, 8-way, linesize 32 bytes. Writing ErrCtl register=00041640 Readback ErrCtl register=00041640 Memory: 248456k/262144k available (3975k kernel code, 13688k reserved, 1274k data, 5756k init, 0k highmem) Hierarchical RCU implementation. Verbose stalled-CPUs detection is disabled. NR_IRQS:128 Trying to install interrupt handler for IRQ24 Trying to install interrupt handler for IRQ25 Trying to install interrupt handler for IRQ22 Trying to install interrupt handler for IRQ9 Trying to install interrupt handler for IRQ10 Trying to install interrupt handler for IRQ11 Trying to install interrupt handler for IRQ12 Trying to install interrupt handler for IRQ13 Trying to install interrupt handler for IRQ14 Trying to install interrupt handler for IRQ16 Trying to install interrupt handler for IRQ17 Trying to install interrupt handler for IRQ18 Trying to install interrupt handler for IRQ19 Trying to install interrupt handler for IRQ20 Trying to install interrupt handler for IRQ21 Trying to install interrupt handler for IRQ23 Trying to install interrupt handler for IRQ26 Trying to install interrupt handler for IRQ27 Trying to install interrupt handler for IRQ28 Trying to install interrupt handler for IRQ15 Trying to install interrupt handler for IRQ8 Trying to install interrupt handler for IRQ29 Trying to install interrupt handler for IRQ30 Trying to install interrupt handler for IRQ31 console [ttyS0] enabled Calibrating delay loop... 577.53 BogoMIPS (lpj=1155072) pid_max: default: 32768 minimum: 301 Mount-cache hash table entries: 512 launch: starting cpu1 launch: cpu1 gone! CPU revision is: 0001992f (MIPS 1004Kc) Primary instruction cache 32kB, VIPT, , 4-waylinesize 32 bytes. Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes MIPS secondary cache 256kB, 8-way, linesize 32 bytes. launch: starting cpu2 launch: cpu2 gone! CPU revision is: 0001992f (MIPS 1004Kc) Primary instruction cache 32kB, VIPT, , 4-waylinesize 32 bytes. Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes MIPS secondary cache 256kB, 8-way, linesize 32 bytes. launch: starting cpu3 launch: cpu3 gone! CPU revision is: 0001992f (MIPS 1004Kc) Primary instruction cache 32kB, VIPT, , 4-waylinesize 32 bytes. Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes MIPS secondary cache 256kB, 8-way, linesize 32 bytes. Brought up 4 CPUs Synchronize counters across 4 CPUs: done. devtmpfs: initialized NET: Registered protocol family 16 release PCIe RST: RALINK_RSTCTRL = 7000000 PCIE PHY initialize ***** Xtal 40MHz ***** start MT7621 PCIe register access RALINK_RSTCTRL = 7000000 RALINK_CLKCFG1 = 73ffeff8 *************** MT7621 PCIe RC mode ************* pcie_link status = 0x3 RALINK_RSTCTRL= 7000000 *** Configure Device number setting of Virtual PCI-PCI bridge *** RALINK_PCI_PCICFG_ADDR = 21007f2 -> 21007f2 PCIE0 enabled PCIE1 enabled interrupt enable status: 300000 Port 1 N_FTS = 1b105000 Port 0 N_FTS = 1b105000 config reg done init_rt2880pci done bio: create slab at 0 SCSI subsystem initialized usbcore: registered new interface driver usbfs usbcore: registered new interface driver hub usbcore: registered new device driver usb pci 0000:00:00.0: BAR 0: can't assign mem (size 0x80000000) pci 0000:00:01.0: BAR 0: can't assign mem (size 0x80000000) pci 0000:00:00.0: BAR 8: assigned [mem 0x60000000-0x600fffff] pci 0000:00:01.0: BAR 8: assigned [mem 0x60100000-0x601fffff] pci 0000:00:00.0: BAR 1: assigned [mem 0x60200000-0x6020ffff] pci 0000:00:00.0: BAR 1: set to [mem 0x60200000-0x6020ffff] (PCI address [0x60200000-0x6020ffff] pci 0000:00:01.0: BAR 1: assigned [mem 0x60210000-0x6021ffff] pci 0000:00:01.0: BAR 1: set to [mem 0x60210000-0x6021ffff] (PCI address [0x60210000-0x6021ffff] pci 0000:01:00.0: BAR 0: assigned [mem 0x60000000-0x600fffff 64bit] pci 0000:01:00.0: BAR 0: set to [mem 0x60000000-0x600fffff 64bit] (PCI address [0x60000000-0x600fffff] pci 0000:00:00.0: PCI bridge to [bus 01-01] pci 0000:00:00.0: bridge window [io disabled] pci 0000:00:00.0: bridge window [mem 0x60000000-0x600fffff] pci 0000:00:00.0: bridge window [mem pref disabled] pci 0000:02:00.0: BAR 0: assigned [mem 0x60100000-0x601fffff 64bit] pci 0000:02:00.0: BAR 0: set to [mem 0x60100000-0x601fffff 64bit] (PCI address [0x60100000-0x601fffff] pci 0000:00:01.0: PCI bridge to [bus 02-02] pci 0000:00:01.0: bridge window [io disabled] pci 0000:00:01.0: bridge window [mem 0x60100000-0x601fffff] pci 0000:00:01.0: bridge window [mem pref disabled] BAR0 at slot 0 = 0 bus=0x0, slot = 0x0 res[0]->start = 0 res[0]->end = 0 res[1]->start = 60200000 res[1]->end = 6020ffff res[2]->start = 0 res[2]->end = 0 res[3]->start = 0 res[3]->end = 0 res[4]->start = 0 res[4]->end = 0 res[5]->start = 0 res[5]->end = 0 BAR0 at slot 1 = 0 bus=0x0, slot = 0x1 res[0]->start = 0 res[0]->end = 0 res[1]->start = 60210000 res[1]->end = 6021ffff res[2]->start = 0 res[2]->end = 0 res[3]->start = 0 res[3]->end = 0 res[4]->start = 0 res[4]->end = 0 res[5]->start = 0 res[5]->end = 0 bus=0x1, slot = 0x0, irq=0x4 res[0]->start = 60000000 res[0]->end = 600fffff res[1]->start = 0 res[1]->end = 0 res[2]->start = 0 res[2]->end = 0 res[3]->start = 0 res[3]->end = 0 res[4]->start = 0 res[4]->end = 0 res[5]->start = 0 res[5]->end = 0 bus=0x2, slot = 0x1, irq=0x18 res[0]->start = 60100000 res[0]->end = 601fffff res[1]->start = 0 res[1]->end = 0 res[2]->start = 0 res[2]->end = 0 res[3]->start = 0 res[3]->end = 0 res[4]->start = 0 res[4]->end = 0 res[5]->start = 0 res[5]->end = 0 Switching to clocksource MIPS NET: Registered protocol family 2 IP route cache hash table entries: 2048 (order: 1, 8192 bytes) TCP established hash table entries: 8192 (order: 4, 65536 bytes) TCP bind hash table entries: 8192 (order: 4, 65536 bytes) TCP: Hash tables configured (established 8192 bind 8192) TCP reno registered UDP hash table entries: 128 (order: 0, 4096 bytes) UDP-Lite hash table entries: 128 (order: 0, 4096 bytes) NET: Registered protocol family 1 4 CPUs re-calibrate udelay(lpj = 1167360) Load Ralink Timer0 Module Load Ralink Timer1 Module Load Ralink Timer2 Module fuse init (API version 7.15) msgmni has been set to 485 Block layer SCSI generic (bsg) driver version 0.4 loaded (major 254) io scheduler noop registered (default) Ralink gpio driver initialized Serial: 8250/16550 driver, 2 ports, IRQ sharing disabled serial8250: ttyS0 at MMIO 0x1e000c00 (irq = 26) is a 16550A serial8250: ttyS1 at MMIO 0x1e000d00 (irq = 27) is a 16550A brd: module loaded loop: module loaded flash manufacture id: ef, device id 40 18 W25Q128BV(ef 40180000) (16384 Kbytes) mtd .name = raspi, .size = 0x01000000 (16M) .erasesize = 0x00010000 (64K) .numeraseregions = 0 Creating 5 MTD partitions on "raspi": 0x000000000000-0x000001000000 : "ALL" 0x000000000000-0x000000030000 : "Bootloader" 0x000000030000-0x000000040000 : "Config" 0x000000040000-0x000000050000 : "Factory" 0x000000050000-0x000001000000 : "Kernel" rdm_major = 253 GMAC1_MAC_ADRH -- : 0x0000045f GMAC1_MAC_ADRL -- : 0xa76d4bfb Ralink APSoC Ethernet Driver Initilization. v3.1 1024 rx/tx descriptors allocated, mtu = 1500! GMAC1_MAC_ADRH -- : 0x0000045f GMAC1_MAC_ADRL -- : 0xa76d4bfb PROC INIT OK! PPP generic driver version 2.4.2 PPP BSD Compression module registered PPP MPPE Compression module registered NET: Registered protocol family 24 FM_OUT value: u4FmOut = 0(0x00000000) FM_OUT value: u4FmOut = 0(0x00000000) FM_OUT value: u4FmOut = 0(0x00000000) FM_OUT value: u4FmOut = 0(0x00000000) FM_OUT value: u4FmOut = 0(0x00000000) FM_OUT value: u4FmOut = 0(0x00000000) FM_OUT value: u4FmOut = 0(0x00000000) FM_OUT value: u4FmOut = 0(0x00000000) FM_OUT value: u4FmOut = 0(0x00000000) FM_OUT value: u4FmOut = 0(0x00000000) FM_OUT value: u4FmOut = 0(0x00000000) FM_OUT value: u4FmOut = 0(0x00000000) FM_OUT value: u4FmOut = 0(0x00000000) FM_OUT value: u4FmOut = 0(0x00000000) FM_OUT value: u4FmOut = 0(0x00000000) FM_OUT value: u4FmOut = 0(0x00000000) FM_OUT value: u4FmOut = 0(0x00000000) FM_OUT value: u4FmOut = 0(0x00000000) FM_OUT value: u4FmOut = 0(0x00000000) FM_OUT value: u4FmOut = 0(0x00000000) xhc_mtk xhc_mtk: xHCI Host Controller xhc_mtk xhc_mtk: new USB bus registered, assigned bus number 1 xhc_mtk xhc_mtk: irq 22, io mem 0x1e1c0000 usb usb1: New USB device found, idVendor=1d6b, idProduct=0002 usb usb1: New USB device strings: Mfr=3, Product=2, SerialNumber=1 usb usb1: Product: xHCI Host Controller usb usb1: Manufacturer: Linux 2.6.36+ xhci-hcd usb usb1: SerialNumber: xhc_mtk hub 1-0:1.0: USB hub found hub 1-0:1.0: 2 ports detected usb usb1: ====>USB connect, port 0 xhc_mtk xhc_mtk: xHCI Host Controller xhc_mtk xhc_mtk: new USB bus registered, assigned bus number 2 usb usb2: New USB device found, idVendor=1d6b, idProduct=0003 usb usb2: New USB device strings: Mfr=3, Product=2, SerialNumber=1 usb usb2: Product: xHCI Host Controller usb usb2: Manufacturer: Linux 2.6.36+ xhci-hcd usb usb2: SerialNumber: xhc_mtk hub 2-0:1.0: USB hub found hub 2-0:1.0: 1 port detected usb usb2: ====>USB connect, port 0 usbcore: registered new interface driver usblp usbcore: registered new interface driver libusual MTK MSDC device init. msdc0 -> ops_get_cd return<0> <- msdc_ops_get_cd() : L<2317> PID<0x26> mtk-sd: MediaTek MT6575 MSDC Driver reg_int_mask=0, INT_MASK= 0 HSDMA_init hsdma_phy_tx_ring0 = 0x00c0c000, hsdma_tx_ring0 = 0xa0c0c000 hsdma_phy_rx_ring0 = 0x00c10000, hsdma_rx_ring0 = 0xa0c10000 TX_CTX_IDX0 = 0 TX_DTX_IDX0 = 0 RX_CRX_IDX0 = 3ff RX_DRX_IDX0 = 0 set_fe_HSDMA_glo_cfg HSDMA_GLO_CFG = 465 GACT probability NOT on netem: version 1.2 u32 classifier Performance counters on input device check on Actions configured Netfilter messages via NETLINK v0.30. nf_conntrack version 0.5.0 (3882 buckets, 15528 max) matchsize=264 IPVS: Registered protocols () IPVS: Connection hash table configured (size=4096, memory=32Kbytes) IPVS: ipvs loaded. GRE over IPv4 demultiplexor driver ip_tables: (C) 2000-2006 Netfilter Core Team, Type=Restricted Cone TCP cubic registered NET: Registered protocol family 10 lo: Disabled Privacy Extensions ip6_tables: (C) 2000-2006 Netfilter Core Team IPv6 over IPv4 tunneling driver sit0: Disabled Privacy Extensions ip6tnl0: Disabled Privacy Extensions NET: Registered protocol family 17 L2TP core driver, V2.0 802.1Q VLAN Support v1.8 Ben Greear All bugs added by David S. Miller registered taskstats version 1 Freeing unused kernel memory: 5756k freed init started: BAlgorithmics/MIPS FPU Emulator v1.5 usyBox v1.12.1 (2017-10-25 10:20devpts: called with bogus options :33 CST) Welcome to _ ____ ____ _ ___ _ _ _ ___ __ | |/ ___/ ___| | | |_ _| \ | | | | \ \/ / _ | | | | | _ | | | || \| | | | |\ / | |_| | |___ |_| | | |___ | || |\ | |_| |/ \ \___/ \____\____| |_____|___|_| \_|\___//_/\_\ ------------------------------------------------- For OEM/ODM, please check: http://www.jcgcom.com/ BusyBox v1.12.1 (2017-10-25 10:20:33 CST) built-in shell (ash) Enter 'help' for a list of built-in commands. # Initializing USB Mass Storage driver... usbcore: registered new interface driver usb-storage USB Mass Storage support registered. EEE Disabled 4:5F:FFFFFFA7:6D:4B:FFFFFFFB Raeth v3.1 (Tasklet) phy_tx_ring = 0x00c14000, tx_ring = 0xa0c14000 phy_rx_ring0 = 0x00c18000, rx_ring[0] = 0xa0c18000 phy_rx_ring0 = 0x00c18000, rx_ring[0] = 0xa0c18000 MT7530 Reset Completed!! change HW-TRAP to 0x17c8f set LAN/WAN LLLLW GMAC1_MAC_ADRH -- : 0x0000045f GMAC1_MAC_ADRL -- : 0xa76d4bfb CDMA_CSG_CFG = 81000000 GDMA1_FWD_CFG = 20710000 device eth2.1 entered promiscuous mode device eth2 entered promiscuous mode ESW: Link Status Changed - Port1 Link Up to 1Gbps register mt_drv === pAd = c0b02000, size = 2946136 === <-- RTMPAllocAdapterBlock, Status=0 pAd->PciHif.CSRBaseAddress =0xc0a00000, csr_addr=0xc0a00000! RTMPInitPCIeDevice():device_id=0x7615 DriverOwn()::Try to Clear FW Own... DriverOwn()::Success to clear FW Own mt_pci_chip_cfg(): HWVer=0x8a10, FWVer=0x8a10, pAd->ChipID=0x7615 mt_pci_chip_cfg(): HIF_SYS_REV=0x76150001 mt7615_init()--> Use 1st ePAeLNA default bin. Use 0st /etc_ro/wlan/MT7615E_EEPROM1.bin default bin. <--mt7615_init() ChipOpsMCUHook cut_through_token_list_init(): TokenList inited done!id_head/tail=0/4096 cut_through_token_list_init(): 8e281708,8e281708 cut_through_token_list_init(): TokenList inited done!id_head/tail=0/4096 cut_through_token_list_init(): 8e281718,8e281718 <-- RTMPAllocTxRxRingMemory, Status=0 === pAd = c0f02000, size = 2946136 === <-- RTMPAllocAdapterBlock, Status=0 pAd->PciHif.CSRBaseAddress =0xc0e00000, csr_addr=0xc0e00000! RTMPInitPCIeDevice():device_id=0x7615 DriverOwn()::Try to Clear FW Own... DriverOwn()::Success to clear FW Own mt_pci_chip_cfg(): HWVer=0x8a10, FWVer=0x8a10, pAd->ChipID=0x7615 mt_pci_chip_cfg(): HIF_SYS_REV=0x76150001 mt7615_init()--> Use 2nd ePAeLNA default bin. Use 1st /etc_ro/wlan/MT7615E_EEPROM2.bin default bin. <--mt7615_init() ChipOpsMCUHook cut_through_token_list_init(): TokenList inited done!id_head/tail=0/4096 cut_through_token_list_init(): 8e281288,8e281288 cut_through_token_list_init(): TokenList inited done!id_head/tail=0/4096 cut_through_token_list_init(): 8e281298,8e281298 <-- RTMPAllocTxRxRingMemory, Status=0 DriverOwn()::Return since already in Driver Own... E2pAccessMode=2 SSID[0]=JCG-6D4BFC-2.4G, EdcaIdx=0 TriBandChGrp=0/0/0/0 cfg_mode=9 cfg_mode=9 wmode_band_equal(): Band Equal! [TxPower] BAND0: 100 [SKUenable] BAND0: 0 [PERCENTAGEenable] BAND0: 1 [BFBACKOFFenable] BAND0: 1 CalCacheApply = 0 APEdca0 APEdca1 APEdca2 APEdca3 APSDCapable[0]=0 APSDCapable[1]=0 APSDCapable[2]=0 APSDCapable[3]=0 APSDCapable[4]=0 APSDCapable[5]=0 APSDCapable[6]=0 APSDCapable[7]=0 APSDCapable[8]=0 APSDCapable[9]=0 APSDCapable[10]=0 APSDCapable[11]=0 APSDCapable[12]=0 APSDCapable[13]=0 APSDCapable[14]=0 APSDCapable[15]=0 default ApCliAPSDCapable[0]=0 DfsZeroWait Support=0/0 DfsZeroWaitCacTime=0/0 [RTMPSetProfileParameters]Disable DFS/Zero wait=0/0 HT: WDEV[0] Ext Channel = BELOW HT: greenap_cap = 0 IcapMode = 0 WtcSetMaxStaNum: MaxStaNum:125, BssidNum:1, WdsNum:0, ApcliNum:1, MaxNumChipRept:0, MinMcastWcid:126 Top Init Done! Use dev_alloc_skb RX[0] DESC a0c44000 size = 16384 RX[1] DESC a0c48000 size = 8192 Hif Init Done! ctl->txq = c0dcc4c4 ctl->rxq = c0dcc4d0 ctl->ackq = c0dcc4dc ctl->kickq = c0dcc4e8 ctl->tx_doneq = c0dcc4f4 ctl->rx_doneq = c0dcc500 mt7615_fw_prepare():FW(8a10), HW(8a10), CHIPID(7615)) mt7615_fw_prepare(2688): MT7615_E3, USE E3 patch and ram code binary image AndesMTLoadRomMethodFwDlRing(1035), cap->rom_patch_len(11102) AndesRestartCheck: Current TOP_MISC2(0x1) AndesRestartCheck: (TOP_MISC2 = 1), ready to continue...RET(0) 20170809192718a platform = ALPS hw/sw version = 8a108a10 patch version = 00000010 Patch SEM Status=2 MtCmdPatchSemGet:(ret = 0) Patch is not ready && get semaphore success, SemStatus(2) EventGenericEventHandler: CMD Success MtCmdAddressLenReq:(ret = 0) MtCmdPatchFinishReq EventGenericEventHandler: CMD Success Send checksum req.. Patch SEM Status=3 MtCmdPatchSemGet:(ret = 0) Release patch semaphore, SemStatus(3) AndesMTEraseRomPatch WfMcuHwInit: Before NICLoadFirmware, check IcapMode=0 AndesMTLoadFwMethodFwDlRing(809), cap->fw_len(462248) Build Date:_201708190346 Build Date:_201708190346 AndesRestartCheck: Current TOP_MISC2(0x1) AndesRestartCheck: (TOP_MISC2 = 1), ready to continue...RET(0) EventGenericEventHandler: CMD Success MtCmdAddressLenReq:(ret = 0) EventGenericEventHandler: CMD Success MtCmdAddressLenReq:(ret = 0) MtCmdFwStartReq: override = 1, address = 540672 EventGenericEventHandler: CMD Success Build Date:_201707211524 EventGenericEventHandler: CMD Success MtCmdAddressLenReq:(ret = 0) MtCmdFwStartReq: override = 4, address = 0 EventGenericEventHandler: CMD Success WfMcuHwInit: NICLoadFirmware OK, Check IcapMode=0 MCU Init Done! efuse_probe: efuse = 10000212 RtmpChipOpsEepromHook::e2p_type=2, inf_Type=5 RtmpEepromGetDefault::e2p_dafault=1 RtmpChipOpsEepromHook: E2P type(2), E2pAccessMode = 2, E2P default = 1 NVM is FLASH mode. dev_idx [0] FLASH OFFSET [0x0] NICReadEEPROMParameters: EEPROM 0x52 b300 NICReadEEPROMParameters: EEPROM 0x52 b300 Country Region from e2p = 101 mt7615_antenna_default_reset(): TxPath = 3, RxPath = 3 mt7615_antenna_default_reset(): DBDC 2G TxPath = 2, 2G RxPath = 2 mt7615_antenna_default_reset(): DBDC 5G TxPath = 2, 2G RxPath = 2 RcRadioInit(): DbdcMode=0, ConcurrentBand=1 RcRadioInit(): pRadioCtrl=8e301438,Band=0,rfcap=3,channel=1,PhyMode=2 extCha=0xf Band Rf: 1, Phy Mode: 2 AntCfgInit(2766): Not support for HIF_MT yet! MtSingleSkuLoadParam: RF_LOCKDOWN Feature OFF !!! MtBfBackOffLoadTable: RF_LOCKDOWN Feature OFF !!! EEPROM Init Done! mt_mac_init()--> mt_mac_pse_init(2750): Don't Support this now! mt7615_init_mac_cr()--> mt7615_init_mac_cr(): TMAC_TRCR0=0x82783c8c MtAsicSetMacMaxLen(1300): Not finish Yet! <--mt_mac_init() CmdRxHdrTransBLUpdateRsp::EventExtCmdResult.u4Status = 0x0 CmdRxHdrTransBLUpdateRsp::EventExtCmdResult.u4Status = 0x0 CmdRxHdrTransBLUpdateRsp::EventExtCmdResult.u4Status = 0x0 MAC Init Done! MT7615BBPInit():BBP Initialization..... Band 0: valid=1, isDBDC=0, Band=2, CBW=1, CentCh/PrimCh=1/1, prim_ch_idx=0, txStream=2 Band 1: valid=0, isDBDC=0, Band=0, CBW=0, CentCh/PrimCh=0/0, prim_ch_idx=0, txStream=0 MT7615BBPInit() todo PHY Init Done! MtCmdSetMacTxRx:(ret = 0) CountryCode(2.4G/5G)=1/10, RFIC=25, PHY mode(2.4G/5G)=14/14, support 13 channels ApAutoChannelAtBootUp-----------------> ApAutoChannelAtBootUp: AutoChannelBootup = 0, AutoChannelFlag = 0 ApAutoChannelAtBootUp<----------------- WifiSysOpen(), wdev idx = 0 wdev_attr_update(): wdevId0 = 04:5f:a7:6d:4b:fc Current Channel is 6. DfsZeroWaitSupport=0 HcUpdatePhyMode(): Update PhyMode for all wdev for this band PhyMode:14,Channel=6 CountryCode(2.4G/5G)=1/10, RFIC=25, PHY mode(2.4G/5G)=14/14, support 13 channels wtc_acquire_groupkey_wcid: Found a non-occupied wtbl_idx:127 for WDEV_TYPE:1 LinkToOmacIdx = 0, LinkToWdevType = 1 bssUpdateBmcMngRate (BSS_INFO_BROADCAST_INFO), CmdBssInfoBmcRate.u2BcTransmit= 0, CmdBssInfoBmcRate.u2McTransmit = 0 [RadarStateCheck]Set into RD_NORMAL_MODE MtCmdTxPowerSKUCtrl: fgTxPowerSKUEn: 0, BandIdx: 0 MtCmdTxPowerPercentCtrl: fgTxPowerPercentEn: 1, BandIdx: 0 MtCmdTxBfBackoffCtrl: fgTxBFBackoffEn: 1, BandIdx: 0 mt7615_bbp_adjust():rf_bw=1, ext_ch=3, PrimCh=6, HT-CentCh=4, VHT-CentCh=0 ap_phy_rrm_init_byRf(): AP Set CentralFreq at 4(Prim=6, HT-CentCh=4, VHT-CentCh=0, BBP_BW=1) LeadTimeForBcn, OmacIdx = 0, WDEV_WITH_BCN_ABILITY RTMPSetLEDStatus: before AndesLedEnhanceOP , status=1, LED_CMD=2! AndesLedEnhanceOP: Success! Main bssid = 04:5f:a7:6d:4b:fc AsicRadioOnOffCtrl(): DbdcIdx=0 RadioOn MtCmdSetMacTxRx:(ret = 0) MCS Set = ff ff ff 00 01 <==== mt_wifi_init, Status=0 MtCmdEDCCACtrl: BandIdx: 0, EDCCACtrl: 1 wlan_operate_set_vht_bw(): new vht_bw:1 > cap_vht_bw: 0, correct to cap_vht_bw WtcSetMaxStaNum: MaxStaNum:125, BssidNum:1, WdsNum:0, ApcliNum:1, MaxNumChipRept:0, MinMcastWcid:126 red_is_enabled: set CR4/N9 RED Enable to 1. cp_support_is_enabled: set CR4 CP_SUPPORT to Mode 2. Correct apidx from 0 to 0 for WscUUIDInit Generate UUID for apidx(0) Set_SCSEnable_Proc() BandIdx=0, SCSEnable=1 mt7615_SetSCS() BandIdx=0, SCSEnable=1 device ra0 entered promiscuous mode DriverOwn()::Return since already in Driver Own... E2pAccessMode=2 SSID[0]=JCG-6D4BFC-5G, EdcaIdx=0 TriBandChGrp=0/0/0/0 cfg_mode=14 cfg_mode=14 wmode_band_equal(): Band Equal! [TxPower] BAND0: 100 [SKUenable] BAND0: 0 [PERCENTAGEenable] BAND0: 1 [BFBACKOFFenable] BAND0: 1 CalCacheApply = 0 APEdca0 APEdca1 APEdca2 APEdca3 APSDCapable[0]=0 APSDCapable[1]=0 APSDCapable[2]=0 APSDCapable[3]=0 APSDCapable[4]=0 APSDCapable[5]=0 APSDCapable[6]=0 APSDCapable[7]=0 APSDCapable[8]=0 APSDCapable[9]=0 APSDCapable[10]=0 APSDCapable[11]=0 APSDCapable[12]=0 APSDCapable[13]=0 APSDCapable[14]=0 APSDCapable[15]=0 default ApCliAPSDCapable[0]=0 DfsZeroWait Support=0/0 DfsZeroWaitCacTime=0/0 [RTMPSetProfileParameters]Disable DFS/Zero wait=0/0 HT: WDEV[0] Ext Channel = ABOVE HT: greenap_cap = 0 IcapMode = 0 WtcSetMaxStaNum: MaxStaNum:125, BssidNum:1, WdsNum:0, ApcliNum:1, MaxNumChipRept:0, MinMcastWcid:126 Top Init Done! Use dev_alloc_skb RX[0] DESC a0c54000 size = 16384 RX[1] DESC a0c58000 size = 8192 Hif Init Done! ctl->txq = c11cc4c4 ctl->rxq = c11cc4d0 ctl->ackq = c11cc4dc ctl->kickq = c11cc4e8 ctl->tx_doneq = c11cc4f4 ctl->rx_doneq = c11cc500 mt7615_fw_prepare():FW(8a10), HW(8a10), CHIPID(7615)) mt7615_fw_prepare(2688): MT7615_E3, USE E3 patch and ram code binary image AndesMTLoadRomMethodFwDlRing(1035), cap->rom_patch_len(11102) AndesRestartCheck: Current TOP_MISC2(0x1) AndesRestartCheck: (TOP_MISC2 = 1), ready to continue...RET(0) 20170809192718a platform = ALPS hw/sw version = 8a108a10 patch version = 00000010 Patch SEM Status=2 MtCmdPatchSemGet:(ret = 0) Patch is not ready && get semaphore success, SemStatus(2) EventGenericEventHandler: CMD Success MtCmdAddressLenReq:(ret = 0) MtCmdPatchFinishReq EventGenericEventHandler: CMD Success Send checksum req.. Patch SEM Status=3 MtCmdPatchSemGet:(ret = 0) Release patch semaphore, SemStatus(3) AndesMTEraseRomPatch WfMcuHwInit: Before NICLoadFirmware, check IcapMode=0 AndesMTLoadFwMethodFwDlRing(809), cap->fw_len(462248) Build Date:_201708190346 Build Date:_201708190346 AndesRestartCheck: Current TOP_MISC2(0x1) AndesRestartCheck: (TOP_MISC2 = 1), ready to continue...RET(0) EventGenericEventHandler: CMD Success MtCmdAddressLenReq:(ret = 0) EventGenericEventHandler: CMD Success MtCmdAddressLenReq:(ret = 0) MtCmdFwStartReq: override = 1, address = 540672 EventGenericEventHandler: CMD Success Build Date:_201707211524 EventGenericEventHandler: CMD Success MtCmdAddressLenReq:(ret = 0) MtCmdFwStartReq: override = 4, address = 0 EventGenericEventHandler: CMD Success WfMcuHwInit: NICLoadFirmware OK, Check IcapMode=0 MCU Init Done! efuse_probe: efuse = 10000212 RtmpChipOpsEepromHook::e2p_type=2, inf_Type=5 RtmpEepromGetDefault::e2p_dafault=1 RtmpChipOpsEepromHook: E2P type(2), E2pAccessMode = 2, E2P default = 1 NVM is FLASH mode. dev_idx [1] FLASH OFFSET [0x8000] NICReadEEPROMParameters: EEPROM 0x52 b300 NICReadEEPROMParameters: EEPROM 0x52 b300 Country Region from e2p = 101 mt7615_antenna_default_reset(): TxPath = 3, RxPath = 3 mt7615_antenna_default_reset(): DBDC 2G TxPath = 2, 2G RxPath = 2 mt7615_antenna_default_reset(): DBDC 5G TxPath = 2, 2G RxPath = 2 RcRadioInit(): DbdcMode=0, ConcurrentBand=1 RcRadioInit(): pRadioCtrl=8d226438,Band=0,rfcap=3,channel=1,PhyMode=2 extCha=0xf Band Rf: 1, Phy Mode: 2 AntCfgInit(2766): Not support for HIF_MT yet! MtSingleSkuLoadParam: RF_LOCKDOWN Feature OFF !!! MtBfBackOffLoadTable: RF_LOCKDOWN Feature OFF !!! EEPROM Init Done! mt_mac_init()--> mt_mac_pse_init(2750): Don't Support this now! mt7615_init_mac_cr()--> mt7615_init_mac_cr(): TMAC_TRCR0=0x82783c8c MtAsicSetMacMaxLen(1300): Not finish Yet! <--mt_mac_init() CmdRxHdrTransBLUpdateRsp::EventExtCmdResult.u4Status = 0x0 CmdRxHdrTransBLUpdateRsp::EventExtCmdResult.u4Status = 0x0 CmdRxHdrTransBLUpdateRsp::EventExtCmdResult.u4Status = 0x0 MAC Init Done! MT7615BBPInit():BBP Initialization..... Band 0: valid=1, isDBDC=0, Band=2, CBW=1, CentCh/PrimCh=1/1, prim_ch_idx=0, txStream=2 Band 1: valid=0, isDBDC=0, Band=0, CBW=0, CentCh/PrimCh=0/0, prim_ch_idx=0, txStream=0 MT7615BBPInit() todo PHY Init Done! MtCmdSetMacTxRx:(ret = 0) CountryCode(2.4G/5G)=1/10, RFIC=25, PHY mode(2.4G/5G)=49/49, support 9 channels ApAutoChannelAtBootUp-----------------> ApAutoChannelAtBootUp: AutoChannelBootup = 0, AutoChannelFlag = 0 ApAutoChannelAtBootUp<----------------- WifiSysOpen(), wdev idx = 0 wdev_attr_update(): wdevId0 = 04:5f:a7:6d:4c:00 Current Channel is 157. DfsZeroWaitSupport=0 HcUpdatePhyMode(): Update PhyMode for all wdev for this band PhyMode:49,Channel=157 CountryCode(2.4G/5G)=1/10, RFIC=25, PHY mode(2.4G/5G)=49/49, support 9 channels wtc_acquire_groupkey_wcid: Found a non-occupied wtbl_idx:127 for WDEV_TYPE:1 LinkToOmacIdx = 0, LinkToWdevType = 1 bssUpdateBmcMngRate (BSS_INFO_BROADCAST_INFO), CmdBssInfoBmcRate.u2BcTransmit= 8192, CmdBssInfoBmcRate.u2McTransmit = 8196 [RadarStateCheck]Set into RD_NORMAL_MODE MtCmdTxPowerSKUCtrl: fgTxPowerSKUEn: 0, BandIdx: 0 MtCmdTxPowerPercentCtrl: fgTxPowerPercentEn: 1, BandIdx: 0 MtCmdTxBfBackoffCtrl: fgTxBFBackoffEn: 1, BandIdx: 0 mt7615_bbp_adjust():rf_bw=2, ext_ch=1, PrimCh=157, HT-CentCh=159, VHT-CentCh=155 ap_phy_rrm_init_byRf(): AP Set CentralFreq at 155(Prim=157, HT-CentCh=159, VHT-CentCh=155, BBP_BW=2) [WrapDfsRadarDetectStart]: Band0Ch is 157 [WrapDfsRadarDetectStart]: Band1Ch is 0 LeadTimeForBcn, OmacIdx = 0, WDEV_WITH_BCN_ABILITY RTMPSetLEDStatus: before AndesLedEnhanceOP , status=1, LED_CMD=2! AndesLedEnhanceOP: Success! Main bssid = 04:5f:a7:6d:4c:00 AsicRadioOnOffCtrl(): DbdcIdx=0 RadioOn MtCmdSetMacTxRx:(ret = 0) MCS Set = ff ff ff 00 01 <==== mt_wifi_init, Status=0 MtCmdEDCCACtrl: BandIdx: 0, EDCCACtrl: 1 WtcSetMaxStaNum: MaxStaNum:125, BssidNum:1, WdsNum:0, ApcliNum:1, MaxNumChipRept:0, MinMcastWcid:126 red_is_enabled: set CR4/N9 RED Enable to 1. cp_support_is_enabled: set CR4 CP_SUPPORT to Mode 2. Correct apidx from 0 to 0 for WscUUIDInit Generate UUID for apidx(0) device rai0 entered promiscuous mode eth2/eth3 RPS: CPU0/2... ipt_account 0.1.21 : Piotr Gasidlo , http://code.google.com/p/ipt-account/ br0: port 3(rai0) entering learning state br0: port 3(rai0) entering learning state br0: port 2(ra0) entering learning state br0: port 2(ra0) entering learning state br0: port 1(eth2.1) entering learning state br0: port 1(eth2.1) entering learning state ***** g_wl_interface = ra0 ****** Mon Jun 1 01:01:00 UTC 2015 webs: Listening for HTTP requests at address 192.168.1.1 WAN link UP -> DOWN GPIO: RESET GPIO18 USB_LED GPIO15